1. Field of the Invention
The present invention relates to circuit design tools and, more particularly, to a system and method for selecting sizes of components for integrated circuits.
2. Description of the Related Art
The design of integrated circuits, for example very large scale integration (VLSI) circuits may be very time consuming and labor intensive. Many iterations are performed before a chip design is completed. The iterations required of chip designers often includes the following procedure:
1. Choose the logic and topology of the circuit to be designed.
2. Choose the initial sizes of the transistors and/or components to attempt to obtain the desired target performance of the circuit to be designed. This selection process typically involves an extensive visual inspection of the circuit and many hand calculations by the designer.
3. Run timing verification using computer aided design tools on the circuit to verify that the circuit has met its target performance.
4. If the desired target performance is not met, adjust the component, for example a transistor, sizes based on the timing results and repeat step 3. The adjustment of the component sizes in this step also includes an extensive visual inspection of the circuit and many calculations that are often performed by hand.
5. If it is not possible to meet the desired target performance using steps 3-4, alter the circuit topology and repeat steps 2-4. In addition, the designer needs to be able to obtain early estimates of circuit performance such that decisions can be made as early as possible as to whether a change in the circuit topology is essential to improve performance.
Steps 2 through 4 may be referred to as tuning steps for "tuning" the circuit. The conventional method as described above tends to be very time consuming and labor intensive. The conventional method usually relies on calculating an RC network in order to evaluate the circuit since this technique lends itself more readily to hand calculations. Therefore, a need exists for an improved system and method for tuning an integrated circuit which provides early estimates of maximum performance and rapid selection of component sizes that meets or exceeds desired performance. A further need exists for providing a more user friendly design tool for analyzing integrated circuit designs.